This invention relates to logic arrays and, in particular, to electrically Alterable Programmable Logic Arrays (ALPLAs) employing non-volatile floating gate devices. Non-volatile floating gate devices are known which have a long retention time, which can be programmed to at least two different conditions, and which require relatively little power to be set to the different conditions. Therefore, in theory, these devices are suitable for use as elements in memory and logic arrays. However, there are many problems in the formation of a relatively dense array using these devices. To form an array, the devices are arranged in rows and columns, with the devices of a row sharing at least one row conductor and the devices of a column sharing at least one column conductor. During a write operation, a selected device must be set to a desired condition without disturbing the non-selected devices. However, since a non-selected device may share a row or a column with a selected device and undergo some stress during a write operation there is the possibility that it (a non-selected device) may undesirably be caused to change state during such operation.
A further complication exists where, for example, complementary signals are applied to adjoining pairs of rows and signals are applied to all the rows concurrently. A problem then exists in controlling the setting of particular devices without disturbing non-selected devices.
Still further, in order to program the devices to the desired conditions, relatively large voltages have to be generated by peripheral circuits and then applied to the devices. Such circuits must be capable of sustaining the stress induced by these voltages. Typically, high voltage circuits require much more area then low voltage circuits making the design of a dense array difficult. In addition to the "space" problem it is desirable that the high voltage circuit designed to drive the rows and columns of the array be fabricated on "pitch", (i.e. in line) with the rows and/or the columns of the devices forming the memory or logic array. These and other problems are resolved in circuits embodying the invention.